Home > Terms > English, UK (UE) > Multiple-fifo architecture

Multiple-fifo architecture

A display controller architecture characterised by having multiple FIFOs or write buffers. There is typically one FIFO or write buffer at the CPU interface, and one or more FIFOs in the display pipeline.

This is auto-generated content. You can help to improve it.
0
Collect to Blossary

Member comments

You have to log in to post to discussions.

Terms in the News

Featured Terms

Contributor

Featured blossaries

Empresas Polar

Category: Food   4 10 Terms

Prominent Popes

Category: Religion   1 20 Terms